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May 31, 2008

The 8085 Microprocessor Architecture Microprocessors & Interfacing

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Chapter 3 The 8085 Microprocessor Architecture Microprocessors & Interfacing Dr. Bassel Soudan 1 The 8085 and Its Busses • • The 8085 is an 8-bit general purpose microprocessor that can address 64K Byte of memory. It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz. – The pins on the chip can be grouped into 6 groups: • • • • • • Address Bus. Data Bus. Control and Status Signals. Power supply and frequency. Externally Initiated Signals. Serial I/O ports. Dr. Bassel Soudan 2 Microprocessors & Interfacing The Address and Data Busses • • The address bus has 8 signal lines A8 – A15 which are unidirectional. The other 8 address bits are multiplexed (time shared) with the 8 data bits. – So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at the same time. • During the execution of the instruction, these lines carry the address bits during the early part, then during the late parts of the execution, they carry the 8 data bits. – In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes. Microprocessors & Interfacing Dr. Bassel Soudan 3 The Control and Status Signals • There are 4 main control and status signals. These are: • ALE: Address Latch Enable. This signal is a pulse that become 1 when the AD0 – AD7 lines have an address on them. It becomes 0 after that. This signal can be used to enable a latch to save the address bits from the AD lines. • RD: Read. Active low. • WR: Write. Active low. • IO/M: This signal specifies whether the operation is a memory operation (IO/M=0) or an I/O operation (IO/M=1). • S1 and S0 : Status signals to specify the kind of operation being performed .Usually un-used in small systems. Microprocessors & Interfacing Dr. Bassel Soudan 4 Frequency Control Signals • There are 3 important pins in the frequency control group. – X0 and X1 are the inputs from the crystal or clock generating circuit. • The frequency is internally divided by 2. – So, to run the microprocessor at 3 MHz, a clock running at 6 MHz should be connected to the X0 and X1 pins. – CLK (OUT): An output clock pin to drive the clock of the rest of the system. • We will discuss the rest of the control signals as we get to them. Dr. Bassel Soudan 5 Microprocessors & Interfacing Microprocessor Communication and Bus Timing • • To understand how the microprocessor operates and uses these different signals, we should study the process of communication between the microprocessor and memory during a memory read or write operation. Lets look at timing and the data flow of an instruction fetch operation. (Example 3.1) Microprocessors & Interfacing Dr. Bassel Soudan 6 Steps For Fetching an Instruction • Lets assume that we are trying to fetch the instruction at memory location 2005. That means that the program counter is now set to that value. – The following is the sequence of operations: • The program counter places the address value on the address bus and the controller issues a RD signal. • The memory’s address decoder gets the value and determines which memory location is being accessed. • The value in the memory location is placed on the data bus. • The value on the data bus is read into the instruction decoder inside the microprocessor. • After decoding the instruction, the control unit issues the proper control signals to perform the operation. Microprocessors & Interfacing Dr. Bassel Soudan 7 Timing Signals For Fetching an Instruction • Now, lets look at the exact timing of this sequence of events as that is extremely important. (figure 3.3) – At T1 , the high order 8 address bits (20H) are placed on the address lines A8 – A15 and the low order bits are placed on AD7– AD0. The ALE signal goes high to indicate that AD0 – AD8 are carrying an address. At exactly the same time, the IO/M signal goes low to indicate a memory operation. – At the beginning of the T2 cycle, the low order 8 address bits are removed from AD7– AD0 and the controller sends the Read (RD) signal to the memory. The signal remains low (active) for two clock periods to allow for slow devices. During T2 , memory places the data from the memory location on the lines AD7– AD0 . – During T3 the RD signal is Disabled (goes high). This turns off the output Tri-state buffers in the memory. That makes the AD7– AD0 lines go to high impedence mode. Microprocessors & Interfacing Dr. Bassel Soudan 8 Demultiplexing AD7-AD0 – From the above description, it becomes obvious that the AD7– AD0 lines are serving a dual purpose and that they need to be demultiplexed to get all the information. – The high order bits of the address remain on the bus for three clock periods. However, the low order bits remain for only one clock period and they would be lost if they are not saved externally. Also, notice that the low order bits of the address disappear when they are needed most. – To make sure we have the entire address for the full three clock cycles, we will use an external latch to save the value of AD7– AD0 when it is carrying the address bits. We use the ALE signal to enable this latch. Microprocessors & Interfacing Dr. Bassel Soudan 9 Demultiplexing AD7-AD0 8085 A15-A8 ALE AD7-AD0 Latch A 7- A 0 D 7- D 0 – Given that ALE operates as a pulse during T1, we will be able to latch the address. Then when ALE goes low, the address is saved and the AD7– AD0 lines can be used for their purpose as the bidirectional data lines. Microprocessors & Interfacing Dr. Bassel Soudan 10 Cycles and States • From the above discussion, we can define terms that will become handy later on: – T- State: One subdivision of an operation. A T-state lasts for one clock period. • An instruction’s execution length is usually measured in a number of T-states. (clock cycles). – Machine Cycle: The time required to complete one operation of accessing memory, I/O, or acknowledging an external request. • This cycle may consist of 3 to 6 T-states. – Instruction Cycle: The time required to complete the execution of an instruction. • In the 8085, an instruction cycle may consist of 1 to 6 machine cycles. Microprocessors & Interfacing Dr. Bassel Soudan 11 Generating Control Signals • The 8085 generates a single RD signal. However, the signal needs to be used with both memory and I/O. So, it must be combined with the IO/M signal to generate different control signals for the memory and I/O. – Keeping in mind the operation of the IO/M signal we can use the following circuitry to generate the right set of signals: Microprocessors & Interfacing Dr. Bassel Soudan 12 A closer look at the 8085 Architecture • • Previously we discussed the 8085 from a programmer’s perspective. Now, lets look at some of its features with more detail. Microprocessors & Interfacing Dr. Bassel Soudan 13 The ALU • In addition to the arithmetic & logic circuits, the ALU includes the accumulator, which is part of every arithmetic & logic operation. Also, the ALU includes a temporary register used for holding data temporarily during the execution of the operation. This temporary register is not accessible by the programmer. • Microprocessors & Interfacing Dr. Bassel Soudan 14 The Flags register – There is also the flags register whose bits are affected by the arithmetic & logic operations. • S-sign flag – The sign flag is set if bit D7 of the accumulator is set after an arithmetic or logic operation. • Z-zero flag – Set if the result of the ALU operation is 0. Otherwise is reset. This flag is affected by operations on the accumulator as well as other registers. (DCR B). • AC-Auxiliary Carry – This flag is set when a carry is generated from bit D3 and passed to D4 . This flag is used only internally for BCD operations. (Section 10.5 describes BCD addition including the DAA instruction). • P-Parity flag – After an ALU operation if the result has an even # of 1’s the p-flag is set. Otherwise it is cleared. So, the flag can be used to indicate even parity. • CY-carry flag – Discussed earlier Microprocessors & Interfacing Dr. Bassel Soudan 15 More on the 8085 machine cycles • • The 8085 executes several types of instructions with each requiring a different number of operations of different types. However, the operations can be grouped into a small set. The three main types are: • Memory Read and Write. • I/O Read and Write. • Request Acknowledge. • These can be further divided into various operations (machine cycles). Dr. Bassel Soudan 16 Microprocessors & Interfacing Opcode Fetch Machine Cycle • The first step of executing any instruction is the Opcode fetch cycle. – In this cycle, the microprocessor brings in the instruction’s Opcode from memory. • To differentiate this machine cycle from the very similar “memory read” cycle, the control & status signals are set as follows: – IO/M=0, s0 and s1 are both 1. – This machine cycle has four T-states. • The 8085 uses the first 3 T-states to fetch the opcode. • T4 is used to decode and execute it. – It is also possible for an instruction to have 6 Tstates in an opcode fetch machine cycle. Microprocessors & Interfacing Dr. Bassel Soudan 17 Memory Read Machine Cycle • The memory read machine cycle is exactly the same as the opcode fetch except: – It only has 3 T-states – The s0 signal is set to 0 instead. Microprocessors & Interfacing Dr. Bassel Soudan 18 The Memory Read Machine Cycle – To understand the memory read machine cycle, let’s study the execution of the following instruction: 2000H 3E • MVI A, 32 – In memory, this instruction looks like: 2001H 32 • The first byte 3EH represents the opcode for loading a byte into the accumulator (MVI A), the second byte is the data to be loaded. – The 8085 needs to read these two bytes from memory before it can execute the instruction. Therefore, it will need at least two machine cycles. – The first machine cycle is the opcode fetch discussed earlier. – The second machine cycle is the Memory Read Cycle. – Figure 3.10 page 83. Microprocessors & Interfacing Dr. Bassel Soudan 19 Machine Cycles vs. Number of bytes in the instruction • Machine cycles and instruction length, do not have a direct relationship. – To illustrate lets look at the machine cycles needed to execute the following instruction. • STA 2065H • This is a 3-byte instruction requiring 4 machine cycles and 13 Tstates. 32H 2010H • The machine code will be stored 65H 2011H in memory as shown to the right 2012H 20H • This instruction requires the following 4 machine cycles: – Opcode fetch to fetch the opcode (32H) from location 2010H, decode it and determine that 2 more bytes are needed (4 T-states). – Memory read to read the low order byte of the address (65H) (3 T-states). – Memory read to read the high order byte of the address (20H) (3 T-states). – A memory write to write the contents of the accumulator into the memory location. Microprocessors & Interfacing Dr. Bassel Soudan 20 The Memory Write Operation • In a memory write operation: – The 8085 places the address (2065H) on the address bus – Identifies the operation as a memory write (IO/M=0, s1=0, s0=1). – Places the contents of the accumulator on the data bus and asserts the signal WR. – During the last T-state, the contents of the data bus are saved into the memory location. Microprocessors & Interfacing Dr. Bassel Soudan 21 Memory interfacing • There needs to be a lot of interaction between the microprocessor and the memory for the exchange of information during program execution. – Memory has its requirements on control signals and their timing. – The microprocessor has its requirements as well. • The interfacing operation is simply the matching of these requirements. Microprocessors & Interfacing Dr. Bassel Soudan 22 Memory structure & its requirements RAM Data Lines ROM WR Input Buffer Address Lines CS Address Lines CS Output Buffer RD Output Buffer RD Data Lines Date Lines • The process of interfacing the above two chips is the same. – However, the ROM does not have a WR signal. Dr. Bassel Soudan 23 Microprocessors & Interfacing Interfacing Memory – Accessing memory can be summarized into the following three steps: – Select the chip. – Identify the memory register. – Enable the appropriate buffer. – Translating this to microprocessor domain: – The microprocessor places a 16-bit address on the address bus. – Part of the address bus will select the chip and the other part will go through the address decoder to select the register. – The signals IO/M and RD combined indicate that a memory read operation is in progress. The MEMR signal can be used to enable the RD line on the memory chip. Microprocessors & Interfacing Dr. Bassel Soudan 24 Address decoding • The result of address decoding is the identification of a register for a given address. – A large part of the address bus is usually connected directly to the address inputs of the memory chip. – This portion is decoded internally within the chip. – What concerns us is the other part that must be decoded externally to select the chip. – This can be done either using logic gates or a decoder. Microprocessors & Interfacing Dr. Bassel Soudan 25 The Overall Picture • Putting all of the concepts together, we get: A15- A10 Chip Selection Circuit 8085 A15-A8 ALE AD7-AD0 Latch CS A 9- A 0 A 7- A 0 D 7- D 0 1K Byte Memory Chip WR RD IO/M RD WR Microprocessors & Interfacing Dr. Bassel Soudan 26 Interfacing the 8155 • • • • The 8155 is a special chip designed to work with the 8085 to demonstrate the interfacing of the 8085. the 8155 has 256 bytes of RAM, 2 programmable I/O ports and a timer. It is usually used in systems designed for use in university labs. We will now concentrate on the memory part of the 8155. Microprocessors & Interfacing Dr. Bassel Soudan 27 Interfacing the 8155 memory section • The 8155 contains all the circuitry needed to interface to the 8085 directly. • It has 8 lines that match the AD0-AD7 of the 8085. • It has 5 control lines that match the control and status lines of the 8085. – The address/data lines are demultiplexed internally inside the 8155 and the control signals needed for the memory are also generated internally. – All that is needed to interface the 8155 to the 8085 is logic to control the 8155 to determine the starting address of the memory segment. Microprocessors & Interfacing Dr. Bassel Soudan 28 Don’t care address lines and fold back memory – It is possible in a small computer system to use multiple addresses for the same memory location. • In that case, memory is small and limited, so it doesn’t make sense to use all of the address lines to specify each of the locations. • Some of the address lines are left unconnected. • That results in don’t care address lines. • The result will be that the same set of memory registers is used when the user enters the different addresses. • This process is called memory fold back. i.e. the new address range is folded back over the old address. • Again, this allows the use of a much simpler decoding circuit for the address lines. Microprocessors & Interfacing Dr. Bassel Soudan 29 Testing Memory Interfacing Circuits • • • Testing a memory chip in an existing system is as easy as loading a byte at a specific address and then verifying that it was loaded. A few more addresses should also be checked. In case of fold back memory, one should test the different address ranges for the don’t care address lines. Microprocessors & Interfacing Dr. Bassel Soudan 30

May 27, 2008

Answers of Microprocessor(8085) & Electronics FAQ


FAQS in Microprocessor 8085 and Electronics with Answers pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! FAQs answered by:- Soumyadev Adhikari Instrumentation and Control Engineering 6th Sem, Roll 1032 Academy Of Technology, Hooghly, WB. Contact the author at bforbaptu@gmail.com pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! Part 1 Microprocessor 8085 pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! 1. Which type of architecture 8085 has? 8085 has Von Neumann architecture. It was derived after the name of mathematician John Von Neumann. It’s having 16 address bus and 8 bit data bus.it can access 2^16 individual memory location. 2. How many memory locations can be addressed by a microprocessor with 14 address lines? 2^14=16384 3. 8085 is how many bit microprocessor? 8 bit as its data bus is 8 bit. 4. Why is data bus bi-directional? As it has to carry data from mp to external device or the reverse. (?) 5. What is the function of accumulator? This register is used to store 8-bit data and to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. 6. What is flag, bus? The ALU includes five flip-flops, which are set or reset after an operation according to data conditions of the result in the accumulator and other registers. They are called Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags. For more details on flagd see Q14. Typical system uses a number of busses, collection of wires, which transmit binary numbers, one bit per wire. A typical microprocessor communicates with memory and other devices (input and output) using three busses: Address Bus, Data Bus and Control Bus. Address Bus The Address Bus consists of 16 wires, therefore Its "width" is 16 bits. A 16 bit Address bus can identify 2^16=65536 memory locations i.e. 0000000000000000 up to 1111111111111111. Because memory consists of boxes, each with a unique address, the size of the address bus determines the size of memory, which can be used. To communicate with memory the microprocessor sends an address on the address bus, eg 0000000000000011 (3 in decimal), to the memory. The memory the selects box number 3 for reading or writing data. Address bus is unidirectional, ie numbers only sent from microprocessor to memory, not other way. Data Bus Data Bus: carries ‘8-bit data’, in binary form, between ìP and other external units, such as memory. The Data Bus typically consists of 8 wires. Data bus used to transmit "data", i.e. information, results of arithmetic, etc, between memory and ìP. Bus is bi-directional. Size of the data bus determines what arithmetic can be done. If only 8 bits wide then largest number is 11111111 (255 in decimal). Data Bus also carries instructions from memory to the microprocessor. Size of the bus therefore limits the number of possible instructions to 256, each specified by a separate number. pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! Control Bus It is a group of various single lines used to provide control and synchronization signals. ìP generates different control signals for different operations. These signals are used to identify the device with which the ìP wants to communicate. 7. What are tri-state devices and why they are essential in a bus oriented system? Tri state logic devices have three states (0, 1 and high impedance). When the enable (may be active high or active low) line is activated, the device works. The disabled enable line makes the device at high impedance state and it is disconnected from the circuit. For example see the tri stated inverter in the figure shown. In microcomputer system the peripherals are connected in parallel between address bus and data bus. Because of tri stated interfacing devices, peripherals do not load the system buses. Processor communicates with one peripheral or device at a time by enabling the tri state line of the interfacing peripheral or device. Tri state logic is critical to proper functioning of the microcomputer. 8. Why are program counter and stack pointer 16-bit registers? Because SP points to the beginning of stack memory (LXI SP 8000H) which is 16-bits. Also PC points to the memory locations (16-bits) of the instructions to be excecuted to maintain the proper sequence of execution of program. 9. What does it mean by embedded system? A specialized computer system that is part of a larger system or machine. Typically, an embedded system is housed on a single microprocessor board with the programs stored in ROM. Virtually all appliances that have a digital interface like watches, microwaves, VCRs, cars etc utilize embedded systems. Some embedded systems include an operating system, but many are so specialized that the entire logic can be implemented as a single program. 10. What are the different addressing modes in 8085? Register:- Data is provided through the registers. Or operand is only register(s). Example: MOV Rd, Rs. Register indirect:- Operand M or register pair. Example: MOV A,M; LDAX B; STAX D; MVI M,32H (exception for immediate addressing mode). Direct:- Operand 8-bit port address or 16-bit memory address. Example: IN 84H, OUT 84H, all CALLs. Immediate:- Instruction having the letter I. Or immediate data to the destination provided. Also all jump instructions as the meaning is jump immediately. Example MVI M, 2H; ADI 47H; LXIH 2050 (exception for direct addressing mode). Implicit:- No operand. Example: XCHG. pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! 11. What is the difference between MOV and MVI? Rd = Destination register, Rs = Source register, M = Memory location pointed out by HL register pair, reg = Regiser, data = 8-bit data. 12. What are the functions of RIM, SIM, IN? Read Interrupt Mask (RIM) RIM is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and to read serial input data bit. RIM loads 8-bit data in the accumulator with the following interpretation: Actually RIM does the following three tasks:  Read the interrupt mask (bit 2, 1, 0).  Identify pending interrupts (bit 6, 5, 4).  Receive serial input data bit (bit 7). Set Interrupt Mask SIM is a multipurpose interrupt used to implement the 8085 interrupts (RST 7.5, 6.5, 5.5) and serial data output. SIM interprets the accumulator content as follows: Actually, SIM does the following three tasks:  Mask the interrupts (bit 2, 1, 0).  Reset RST 7.5 (bit 4). This is mainly used to overwrite RST 7.5 without serving it. pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now!  To implement serial I/O (bit 7, 6). If bit 6 = 1 is used to enable serial I/O and bit 7 is used to transmit serial output data bit. Input Data to Accumulator from a Port with 8-bit Address (IN) The contents of the input port designated in the operand are read and loaded into the accumulator. The operand is an 8-bit address. During execution, this port address is duplicated in the lower order and higher order address buses. Any one of the sets of address lines can be decoded to enable the input port. 13. What is the immediate addressing mode? See Q10. 14. What are the different flags in 8085? The 8085 has 5 flags represented by 5 bits of the flag register which are set or reset after an operation according to data conditions of the result (of that operation) stored in the accumulator and other registers. They are:Sign flag (S):- For D7=1 or 0, S=set (result is unsigned) or reset (result is signed). Zero flag (Z):- For the result containing 00H, Z=set, for non zero result Z=reset. Auxiliary carry flag (Ac):- For any result generating a carry / borrow in the D3 bit position and passing it to D4 bit position, Ac=set. Else it is reset. Parity flag (P):- For a result containg even number of 1s there is even parity and odd number of 1s there is odd parity. Carry flag (Cy):- For the result generating any carry Cy is set else reset. 15. What happens during DMA transfer? To make a fast data transfer, the MPU releases the control of its buses to DMA. DMA acts as an external device and the active high input signal HOLD goes HIGH when the DMA is requesting to the MPU to use its buses. After receiving the HOLD request from DMA, the MPU releases the buses in the following machine cycle and generates an active high output signal HLDA indicating the release of buses. Once the DMA gains that control, it acts in the role of the MPU for data transfer. 16. What do you mean by wait state? What is its need? A wait state is a delay experienced by ìP when accessing external memory or another device that is slow to respond. the vice versa also cone into scenario. Now, to be able to access slow memory the ìP must be able to delay the transfer until the memory access is complete. One way is to increase the ìP clock period by reducing the clock frequency. Some ìPs provide a special control input called READY to allow the memory to set its own memory cycle time. If after sending an address out, the ìP dies not receive a READY input from memory, it enters a wait state for as long as the READY line is in 0 state. When the memory access is completed the READY goes high to indicate that the memory is ready for specified transfer. pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! 17. What is PSW? PSW (Program Status Word) represents the contents of the accumulator and the flag register together considering the accumulator as the high order and flag as the low order register as if it is the AF register pair. For example POP PSW. 18. What is ALE? Explain the functions of ALE in 8085. It is the acronym for Address Latch Enable (pin number 30) used to demultiplex the multiplexed lower order address/data bus. During T1 the ALE goes HIGH. When ALE goes HIGH, the latch is enabled. So the o/p changes according to the i/p data. During T1 the o/p of latch is 05H. When ALE goes LOW, the data byte 05H is latched until the next ALE. And after the latching operation the o/p of the latch represents the lower order address bus A0-A7. The following figure will illustrate the function: 19. What is a program counter? What is its use? This 16-bit register deals with sequencing the execution of instructions. This register is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register. The microprocessor uses this register to sequence the execution of the instructions. The function of the program counter is to point to the memory address from which the next byte is to be fetched. When a byte (machine code) is being fetched, the program counter is incremented by one to point to the next memory location. 20. What is an interrupt? The interrupt I/O is a process of data transfer whereby an external device or peripheral can inform the processor that it is ready for communication and requests attention. The process is initiated by external device and is asynchronous (i.e. can be initiated anytime irrespective of the system clock). 21. Which line will be activated when an output device require attention from CPU? pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! Interrupt Request (INTR, pin 10, it is an input signal to ìP). It goes high when the external devices want to communicate. Part 2 Electronics pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! 1. What is meant by D-FF? A FF having one delay (D) input and two outputs is called D-FF. The next state of the FF follows the value of the input D when a clock pulse is applied. But the transfer of data from input to output is delayed and so it is called delay FF. 2. What is the basic difference between Latches and Flip flops? The main difference between latch and F/F is that latches are level sensitive while F/Fs are edge sensitive. They both require the use of clock signal and are used in sequential logic. For a latch, the output tracks the input when the clock signal is HIGH, so as long as the clock is at logic 1, the output can change if the input also changes. F/F on the other hand, will store the input only when there is a rising/falling edge of the clock. 3. What is a multiplexer? A digital multiplexer or MUX is a combinational logic circuit that select binary information from one of many input lines and directs it to a single output line. The selection of a particular input line is controlled by selection lines. Generally a 2n x 1 MUX has “2n ”number of input lines and “n” number of selection lines. 4. How can you convert an SR Flip-flop to a JK Flip-flop? Step 1:- Block diagram is drawn as follows: pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! Our aim is to design the circuit for the next state decoder. Step 2:- The Present State-Next State table for JK F/F is drawn as follows: Step 3:- Using the Application table of SR F/F, the next state codes i.e. the S & R values can be added in the above PS/NS table of JK F/F as follows: Step 4:- The K-maps are drawn as follows to find the expression of S & R in terms of J, K, Qn and Qn’ to design the next state decoder circuit: Step 5:- Now the SR F/F is converted to JK F/F by using the next state decoder circuit (see on next page). pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! 5. How can you convert a JK Flip-flop to a D Flip-flop? Step 1:- Block diagram is drawn as follows: Our aim is to design the circuit for the next state decoder. Step 2:- The Present State-Next State table for D F/F is drawn as follows: Step 3:- Using the Application table of JK F/F, the next state codes i.e. the J & K values can be added in the above PS/NS table of D F/F as follows: Step 4:- The K-maps are drawn as follows to find the expression of J & K in terms of D, Qn and Qn’ to design the next state decoder circuit (see on next page): pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! Step 5:- Now the JK F/F is converted to D F/F by using the next state decoder circuit. 6. What is Race-around problem? How can you rectify it? It is a problem regarding the level triggered FF. Consider a JK FF. When the inputs are J=K=1 and Q=0 and a clock pulse of width tp is applied, the output will change from 0 to 1 after a time interval of t (propagation delay through 2 NAND gates in series). Now, after time t, we have J=K=1 and Q=1. After another time interval of t the output will be 0 again. Hence, the output will oscillate between 0 and 1 in the duration tp. So, at the end of the clock pulse the value of Q is uncertain (either 0 or 1). This situation is known as Race Around Condition. It can be avoided if tp<t can be achieved. Lumped delay lines can be used in series with the feedback connection in order to increase the loop delay beyond tp. Before the development of edge triggered FF, this type of problems of level triggered FF was encountered by using Master-Slave FF. 7. Which semiconductor device is used as a voltage regulator and why? pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! Silicon Zener diode is used as regulator. Because in the reverse bias, due to breakdown, the reverse voltage remains nearly constant in spite of large reverse current change through the diode. 8. What do you mean by an ideal voltage source? An ideal voltage source is one which delivers energy with a voltage across the output terminal that is a prescribed function of time and independent of the current from the source. The main difference between a practical source and an ideal source is that the practical one always has some internal source resistance (Rs), which the ideal one dose not has. If we apply KVL in both the ideal and practical circuits, the voltage across the load (VL=iRL) will be: For practical case: VL = V – iRs -----------------------> (1) For ideal case: VL = V ------------------------------> (2) The V-I characteristics of both the sources are drawn by following the equations (1) & (2). 9. What do you mean by zener breakdown and avalanche breakdown? For a highly doped diode, the junction width is very small. When reverse voltage of such a diode is increased, the electric field at the junction increases. This electric field is so high that it tears valance electrons from the atoms inside the junction. Very large number of electrons and holes are generated due to this hogh electric field at the junction. As a result a sudden change in the reverse current occurs. At that condition, a small change in the reverse voltage can cause big change in reverse current. This phenomenon is called Zener Breakdown. pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! At a comparatively higher reverse voltage than that where Zener breakdown occurs, thermally generated holes & electrons at the junction get energy by this reverse voltage. After being energized, they collide with the atoms of the junction and dislodge electrons from the valance band. Number of hole electron pairs are multiplied with stages of collision. As a result a sudden change in the reverse current occurs. At that condition, a small change in the reverse voltage can cause big change in reverse current. This thing is said to be Avalanche breakdown. Actually, the reverse current of the diode suddenly increases due to Zener and/or Avalanche effect. 10. What are the different types of filters? Filters may be classified in different ways:  Analog or digital filters.  Passive or active (LPF, HPF, BPF, BRF and APF)filters.  Audio (AF) or radio (RF) frequency filters. Analog filters are designed to work with analog signals and digital filters uses digital technique to work with analog signals. Filters made of passive elements like resistors, capacitors and inductors are called Passive filters and filters made of active (transistors, op-amps) and passive elements are called Active filters. Depending upon the operating range of filters, they are classified as AF or RF filters. Generally RC filters are AF and LC or crystals are RF. 11. What is the need of filtering ideal response of filters and actual response of filters? pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! It is done to compare different filters of same type (Butterworth, Chebyshev, Cauer etc). In figure, two high pass filters are shown. A good comparison before selection of either of them can be done if we study the ideal response. 12. What is sampling theorem? According to Nyquist Sampling theorem an analog signal can be represented faithfully from its sampled form if the sampling rate (Fs) is greater or equal to the maximum frequency (F) of the original analog signal. 13. What is impulse response? Impulse response is the response of a dynamic system to an impulse ((t) =0 for all t except t =0) change in the input. Suppose the transfer function of the system is C(S) / R(S) = 1 / (S+1). If the unit impulse change in the input occurs, then c(t) = exp(-t) [As r(t) = (t), R(S) = 1]; So, the time domain impulse response is nothing but the plot of inverse Laplace Transform of the system transfer function. Sometimes, therefore, this is called the Natural response. 14. Explain the advantages and disadvantages of FIR filters compared to IIR counterparts. FIR filters are characterized by their simple architecture and thus lower implementation complexity. For example, the FIR filter can be implemented using only a single multiplier and an accumulator. In addition the FIR can use fewer bits than the IIR filter due to the absence of a feedback loop which introduces more errors. In contrast to the IIR filters where the output can sometimes be unstable, the FIR, on the other hand, can always be designed such that its output is stable. In addition, the FIR filter can have a linear phase if the filter coefficients are symmetrical or antisymmetrical around the center frequency. This feature is essential for data pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! transmission, video processing and high-quality audio systems. Another advantage of the FIR filters is that errors introduced as a result of quantizing filter coefficients can have a low impact on the filter outputs in case the quantization process was properly handled. This is a very important property when a low biterror rate is desired. Even though the FIR possesses have many advantages; many disadvantages arise compared to the IIR. FIR filters usually have a higher order than IIR filters for a given spectral characteristic. Thus, FIR filters require a higher number of multipliers compared to IIR filters in case the implementation is fully pipelined and thus every output needs one iteration. On the other hand, if the implementation is not pipelined, the FIR would take more time than the IIR filter. These disadvantages translate into larger memory requirements and computational resources. In addition, “FIR coefficients must be designed using an iterative method since the required filter length to satisfy a given filter specification can only be estimated”. In other words, the designer specifies the order of the filter, given certain specs, and then simulates the frequency response. If it didn’t meet the desired response, he re-estimates a new order based on the previous results and repeats the process. 15. What is CMRR? Explain briefly. It is the acronyms for Common Mode Rejection Ratio. It is the ratio of actual differential voltage gain (Ad) to the common mode voltage gain (Ac) in case of differential amplifiers. So, CMRR = Ad / Ac; also Ac = Vocm / Vcm; where Vocm = o/p common mode voltage, Vcm = i/p common mode voltage. For general IC741, CMRR = 90Db (under 10k i/p source resistance), for precision IC741 it is 120Db. For that reason IC741 is usable under noisy environment. 16. What do you mean by half-duplex and full-duplex communication? Explain briefly. In case of Half Duplex communication the communicating stations can not transmit or receive data at the same interval of time which is possible in Full Duplex communication. 17. Which ranges of signals are used for terrestrial transmission? Microwaves (1-300GHz) are used in satellite communication for example. Also HF (330MHz), VHF (30-300MHz), UHF (300MHz-3GHz) are also used in ground, sky and line of site propagation. 18. What is the need for modulation? There are the following basic three needs:  Ease of radiation: - Generally the receiving antenna size (S) and the wavelength  of radiation is related by S>>So practically it becomes impossible to receive a low frequency signal as the antenna size becomes very large. After pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! modulation the modulated signal frequency becomes high resulting very small wavelength.  Simultaneous transmission of several signals: - Consider several radio stations delivering audio signals of more or less same bandwidth. They may be overlapped in the channel. So, only one radio station can broadcast at a time which is wastage of channel space. One way to solve this problem is to use modulation.  Narrow-banding: - Suppose a baseband signal from a broadcast system is radiated directly with the frequency range 50Hz to 10Kz i.e. with a band-edge ratio (ratio of highest to lowest wavelength) of 200. If an antenna is made for 50Hz, it will be too long for 10 KHz and vice versa. So, we may require a antenna suitable for band-edge ratio 200 which is practically impossible. But frequency translation makes a wideband signal narrowband. Here band width is referred to as the ratio of the edge frequencies of the band. This is narrowbanding. 19. Which type of modulation is used in TV transmission? Vestigial Side Band Suppressed Carrier (VSB-SC) modulation is used. 20. Why we use vestigial side band (VSB-C3F) transmission for picture? Bandwidth of signals used for picture reception is very large, so standard AM cannot be used. If SSB was used, it would result in half the bandwidth. But, SSB receivers being complex, they are not used. So vestigial transmission is used in which a vestige or trace of the unwanted sideband is transmitted along with the wanted sideband and carrier. Actually in VSB, instead of rejecting one side band completely like SSB, a gradual cut off of one side band is accepted. 21. When transmitting digital signals is it necessary to transmit some harmonics in addition to fundamental frequency? Consider a 6bps (taken very slow for easy understanding) digital signal transmission. The best case and worst case digital and analog signals are shown. In worst case and best case, to simulate the digital signal the, necessary analog signal should be of 3Hz and 0Hz respectively. As the bit rate increases, the necessity of high frequency analog signal increases and the possibility of sending pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! a single frequency (fundamental) signal decreases. So, for high bit rate, to improve the shape of the signal to make it recognizable by the receiver, we need to add some odd harmonics. 22. For asynchronous transmission, is it necessary to supply some synchronizing pulses additionally or to supply start and stop bit? Yes, it is necessary. Otherwise the receiver will not be able to detect the starting or the ending of a byte sent by receiver. And in Asynchronous transmission it is not the responsibility of the receiver to group the bits sent by sender. 23. BPFSK is more efficient than BFSK in presence of noise. Why? If the question is “BPSK is more efficient than BFSK in presence of noise. Why?” (Not sure whether it is a printing mistake or not but if one knows what is BPFSK please inform me) then the answer is as follows: Actually, BPSK is not susceptible to the noise degradation that affects ASK or bandwidth limitations of BFSK ( BFSK needs more bandwidth than BPSK) . This means that smaller variations in the BPSK signal due to noise can be detected reliably. 24. What is meant by pre-emphasis and de-emphasis? Pre-emphasis: - Improving the signal to noise ratio by increasing the magnitude of higher frequency signals with respect to lower frequency signals. De-emphasis: - Improving the signal to noise ratio by decreasing the magnitude of higher frequency signals with respect to lower frequency signals. pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! 25. What do you mean by 3 dB cutoff frequency? Why is it 3 dB, not 1 dB? In case of frequency response of active filters, Cut off frequency is referred to that limiting frequency after which the gain decreases @ 20dB/decade. We - know, gain (in dB) = 20log|Vo/Vin|, where |Vo/Vin| = AF/ sqrt(1+(F/FH)^2). Now, at F=FH, |Vo/Vin| = AF/sqrt2 = 0.707AF. Now, if we consider the passband gain i.e. AF = 1, then the gain at cut off frequency wil be = 20log (0.707) = 3dB. That is why it is always called 3dB cut off frequency, not 1dB. In addition, 3db implies 70% (0.707) of the power, i.e. we r interested to consider the bandwidth range from peak to 70% because upto 70% it’s reliable. Hence 3db is called the half power frequency. 26. What do you mean by ASCII, EBCDIC? ASCII: - American Standard Code for Information Interchange. A seven or eight bit code used to represent alphanumeric characters. It is the standard code used for communications between data processing systems and associated equipment. EBCDIC: - Extended Binary Coded Decimal Interchange Code. It is an 8-bit character encoding (code page) used on IBM mainframe operating systems such as z/OS, OS/390, VM and VSE, as well as IBM minicomputer operating systems such as OS/400 and i5/OS (see also Binary Coded Decimal). It is also employed on various non-IBM platforms such as Fujitsu-Siemens' BS2000/OSD, HP MPE/iX, and Unisys MCP. It descended from punched cards and the corresponding six bit binary-coded decimal code that most of IBM's computer peripherals of the late 1950s and early 1960s used. pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now! More questions are welcome. pdfMachine A pdf writer that produces quality PDF files with ease! Produce quality PDF files in seconds and preserve the integrity of your original documents. Compatible across nearly all Windows platforms, simply open the document you want to convert, click “print”, select the “Broadgun pdfMachine printer” and that’s it! Get yours now!

options available for int 21h instruction

NT 21h / AH=01h - read character from standard input, with echo, result is stored in AL.
----------------------------------------

INT 21h / AH=02h - write character to standard output.
entry: DL = character to write, after execution AL = DL.
--------------------------------------------------------------------------------


INT 21h / AH=06h - direct console input;
returns: ZF set if no character available and AL = 00h, ZF clear if character available.
AL = character read; buffer is cleared.
--------------------------------------------------------------------------------


INT 21h / AH=07h - character input without echo.
--------------------------------------------------------------------------------


INT 21h / AH=09h - output of a string at DS:DX. String must be terminated by '$' sign.
--------------------------------------------------------------------------------


INT 21h / AH=0Ah - input of a string to DS:DX, fist byte is buffer size (open int21.asm in c:\emu8086\examples), second byte is number of chars actually read. Does not add '$' in the end of string. To print using INT 21h / AH=09h you must set dollar sign at the end of it and start printing from address DS:DX + 2.
--------------------------------------------------------------------------------


INT 21h / AH=0Bh - get input status;
returns: AL = 00h if no character available, AL = 0FFh if character is available.
--------------------------------------------------------------------------------


INT 21h / AH=0Ch - flush keyboard buffer and read standard input.
entry: AL = number of input function to execute after flushing buffer (can be 01h,06h,07h,08h, or 0Ah - for other values the buffer is flushed but no input is attempted); other registers as appropriate for the selected input function.
----------------------------

INT 21h / AH=25h - set interrupt vector;
input: AL = interrupt number. DS:DX -> new interrupt handler.
----------------------------------------
----------------------------------------


INT 21h / AH=2Ah - get system date;
return: CX = year (1980-2099). DH = month. DL = day. AL = day of week (00h=Sunday)
--------------------------------------------------------------------------------


INT 21h / AH=2Ch - get system time;
return: CH = hour. CL = minute. DH = second. DL = 1/100 seconds.
--------------------------------------------------------------------------------


INT 21h / AH=35h - get interrupt vector;
entry: AL = interrupt number;
return: ES:BX -> current interrupt handler.


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May 19, 2008

Floating Point Initializations

A86 allows floating point numbers as the operands to DD, DQ, and
DT directives. The numbers are encoded according to the IEEE
standard, followed by the 8087 and 287 coprocessors. The format
for floating point constants is as follows: First, there is a
decimal number containing a decimal point. There must be a
decimal point, or else the number is interpreted as an integer.
There must also be at least one decimal digit, either to the left
or right of the decimal point, or else the decimal point is
interpreted as an addition (structure element) operator.
Optionally, there may follow immediately after the decimal number
the letter E followed by a decimal number. The E stands for
"exponent", and means "times 10 raised to the power of". You may
provide a + or - between the E and its number. Examples:

0.1 constant one-tenth
.1 the same
300. floating point three hundred
30.E1 30 * 10**1; i.e., three hundred
30.E+1 the same
30.E-1 30 * 10**-1; i.e., three
30E1 not floating point: hex integer 030E1
1.234E20 scientific notation: 1.234 times 10 to the 20th
1.234E-20 a tiny number: 1.234 divided by 10 to the 20th


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May 18, 2008

Effective addresses

Effective Addresses

Most memory data accessing in the 86 family is accomplished via
the mechanism of the effective address. Wherever an effective
address specifier "eb", "ew" or "ed" appears in the list of 8086
instructions, you may use a wide variety of actual operands in
that instruction. These include general registers, memory
variables, and a variety of indexed memory quantities.

GENERAL REGISTERS: Wherever an "ew" appears, you can use any of
the 16-bit registers AX,BX,CX,DX,SI,DI,SP, or BP. Wherever an
"eb" appears, you can use any of the 8-bit registers
AL,BL,CL,DL,AH,BH,CH, or DH. For example, the "ADD ew,rw" form
subsumes the 16-bit register-to-register adds; for example, ADD
AX,BX; ADD SI,BP; ADD SP,AX.

MEMORY VARIABLES: Wherever an "eb", "ew", or "ed" appears, you
can use a memory variable of the indicated size: byte, word, or
doubleword. Variables are typically declared in the DATA
segment, using a DW declaration for a word variable, or a DB
declaration for a byte variable. For example, you can declare
variables:

DATA_PTR DW ?
ESC_CHAR DB ?

then you can load or store these variables:

MOV ESC_CHAR,BL ; store the byte variable ESC_CHAR
MOV DATA_PTR,081 ; initialize DATA_PTR
MOV SI,DATA_PTR ; load DATA_PTR into SI for use
LODSW ; fetch the word pointed to by DATA_PTR

Alternatively, you can address specific unnamed memory locations
by enclosing the location value in square brackets; for example,

MOV AL,[02000] ; load contents of location 02000 into AL

Note that A86 discerned from context (loading into AL) that a
BYTE at 02000 was intended. Sometimes this is impossible, and
you must specify byte or word:

INC B[02000] ; increment the byte at location 02000
MOV W[02000],0 ; set the WORD at location 02000 to zero

6-2

INDEXED MEMORY: The 86 supports the use of certain registers as
base pointers and index registers into memory. BX and BP are the
base registers; SI and DI are the index registers. You may
combine at most one base register, at most one index register,
and a constant number into a run time pointer that determines the
location of the effective address memory to be used in the
instruction. These can be given explicitly, by enclosing the
index registers in brackets:

MOV AX,[BX]
MOV CX,W[SI+17]
MOV AX,[BX+SI+5]
MOV AX,[BX][SI]5 ; another way to write the same instr.

Or, indexing can be accomplished by declaring variables in a
based structure (see the STRUC directive in Chapter 9):

STRUC [BP] ; NOTE: based structures are unique to A86!
BP_SAVE DW ? ; BP_SAVE is a word at [BP]
RET_ADDR DW ? ; RET_ADDR is a word at [BP+2]
PARM1 DW ? ; PARM1 is a word at [BP+4]
PARM2 DW ? ; PARM2 is a word at [BP+6]
ENDS ; end of structure
INC PARM1 ; equivalent to INC W[BP+4]

Finally, indexing can be done by mixing explicit components with
declared ones:

TABLE DB 4,2,1,3,5
MOV AL,TABLE[BX] ; load byte number BX of TABLE

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May 17, 2008

8051 or PIC microcontroller which is better

This is the conversation between different guys so here it goes

8051 or PIC Suggest Me

I want to go into microcontroller development. And I will take course for the same. Can some one suggest me for which microcontroller should I go, 8051 or PIC. According to my knowledge 8051 is used by most company and its development tools are also available. And 8051 is easy to learn and program as compared to PIC. So what is your suggestion.


Answers :

Nilesh

I think 8051 is the basic micro-controller for the study of other micro-controllers. And PIC is somewhat advanced. I found that PIC micro-controllers are most widely used in industrial automation and controls as it is simple and it has ADC inbuilt, it has sufficient memory, its development tools are easily available on net. I think PIC is one of the roboust micro-controller. Also its cost is less than other micro-controllers. So I prefer PIC micro-controllers.


sandeep

hey currently industry uses 32 bit micro controllers like ARM. 8051 or PIC is just beginning. Their is lot more to learn after this

kapil

I think PIC is a very good option for you than the 8051.Because thats a very older versions micros,All will soon be replaced by PIC s i think.. So its beginning for PIC better opt for it.

Kamal

8051 consists of a CISC processor.. so programming this microcontroller is difficult.. further it is not in use in large scale..
PICS are RISC and consists of only 35(16Fseries). simple to understand and easy to implement.
try PIC16F84A.. it is excellent for learning the basics

sandeep

I think selection of micro controller depending on the application.

PIC has many inbuilt modules like ADC,SPI,USART,I2C ,ICSPonly 35 instruction to learn
sum PIC are costly .But 8051 have advantage ,easy to learn in first step it is more stable than PIC.Many companies make 8051 based core micro-.It has many inernal modules like in PIC.Some Companies are ATMEL,PHILIPS,DALLAS,ST,FREESCALE,TI,SIL

May 16, 2008

Operator Precedence

Consider the expression 1 + 2 * 3. When A86 sees this expression, it could perform the multiplication first, giving an answer of 1+6 = 7; or it could do the addition first, giving an
answer of 3*3 = 9. In fact, A86 does the multiplication first,because A86 assigns a higher precedence to multiplication than it does addition.

The following list specifies the order of precedence A86 assigns to expression operators. All expressions are evaluated from left to right following the precedence rules. You may override this order of evaluation and precedence through the use of parentheses

( ). In the example above, you could override the precedence by parenthesizing the addition: (1+2) * 3.

Some symbols that we have referred to as operators, are treated by the assembler as operands having built-in values. These include $, and ST. In a similar vein, a segment override term (a segment register name followed by a colon) is recorded when it is scanned, but not acted upon until the entire containing expression is scanned and evaluated. The size operators B, W, D,F, Q, and T are also recorded and applied after scanning and evaluation.

If two operators are adjacent, the rightmost operator must have precedence; otherwise, parentheses must be used. For example,
the expression BIT ! 1 is illegal because the leftmost operator

BIT has the higher precedence of the two adjacent operators BIT and "!". You can code BIT (! 1).

--Highest Precedence--

1. Parenthesized expressions

2. Period

3. OFFSET, SEG, TYPE, REF, DEF, and PTR

4. HIGH, LOW, and BIT

5. Multiplication and division: *, /, MOD, SHR, SHL

6. Addition and subtraction: +,-

a. unary

b. binary

7. Relational: EQ, NE, LT, LE, GT, GE =

8. Logical NOT and !

9. Logical AND

10. Logical OR and XOR

11. Colon for long pointer, SHORT, LONG, and BY

12. DUP

--Lowest Precedence--

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May 14, 2008

assembly Program to create , write and close file

It creates a file named trail.try and then uses function 40h to write a string of ASCII characters to the file function 3Eh is used to close file.

;named trail.try.
data segment
org 1000h
handle dw? ; reserve ram for handle variable
data ends
code segment
mov sp,6000h
mov dx,path
mov ah,03ch
mov cx,0000h
int 21h
mov handle,ax
mov bx,ax
mov ah,40h
mov cx,0005h
mov dx,msg
int 21h
mov ax,3e00h
mov bx,handle
int 21h
path: 'db' A: TRAIL.TRY',00h
msg: db 'hello'; msg to be written
code ends

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May 13, 2008

Program to find out the number of even and odd numbers from a given series

Program to find out the number of even and odd numbers from a given series of 16 bit hexadecimal numbers.

The simplest logic to decide whether a binary number is even or odd is to check the least significant bit of the number. If the bit is zero, the number is even, else its odd. Check the LSB by rotating the number through carry flag and increment even or odd number counter.


ASSUME CS:CODE, DS:DATA
DATA SEGMENT
LIST DW 2357H,0a579H,0c2322H,0c91eH,0c0000H,0957H
COUNT EQU 006h
DATA ENDS
CODE SEGMENT

START: XOR BX,BX
XOR DX,DX
MOV AX,DATA
MOV DS,AX
MOV CL,COUNT
MOV SI, OFFSET LIST
AGAIN: MOV AX,[SI]
RPR AX,01
JC ODD
INC BX
JMP NEXT
ODD: INC DX
NEXT: ADD SI,02
DEC CL
JNZ AGAIN
MOV AH,4CH
INC 21H
CODE ENDS
END START

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assembly program to find out the largest number from an unordered array

The program to find out the largest number from an unordered array of sixteen 8 bit numbers stored sequentially in the memory locations starting at offset 0500H in the segment 2000H


Logic: The 1st number of the array is taken in a register, say AL. The 2nd number of array is then compared with the 1st one. If the 1st one is greater than 2nd one, it is left unchanged. However, if the 2nd one is greater than 1st, 2nd number replaces the 1st one in the AL register. The procedure is repeated for every number in array and thus requires 15 iterations.



MOV CX, 0FH; Initialize counter for no. of iterations
MOV AX, 2000H; Initialize data segment
MOV DS, AX;
MOV SI, 0500H; Initialize source pointer
MOV AL, [SI]; Take 1st number in AL
BACK: INC SI;
CMP AL,[SI];
INC SI;
CMP AL,[SI];
JNC NEXT;
MOV AL,[SI];
NEXT: LOOP BACK; Repeat the procedure 15 times
HLT

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TCP/IP on PIC 18 series

TCP/IP stack is readly avalibe from Microchip.com
implement the tcp/ip or udp port in your projects using ENC28j60 from microchip, using SPI port

or try this

Go to www.microchip.com and search for

PIC18F97J60

It comes with ready TCP IP stack and it will help you...let me know if you need further information...

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May 10, 2008

Serial Port interfacing with atmega

Here is the code to interface atmega32 and serial port.


.include"m32def.inc"
.org 0000
rjmp main


main: ldi r16,low(ramend)
out SPL,r16
ldi r16,high(ramend)
out SPH,r16

ldi r18,0x00
out UBRRH,r18
ldi r18,0x19 ;setting baud rate of 2400 for 1MHZ
out UBRRL,r18
ldi r19,0x18
out UCSRB,r19 ;enabling RX & TX bits
ldi r19,0x86
out UCSRC,r19 ;setting aychronous mode with 1 stop
;& 1start bit & no parity
again: rcall usart_rx
rcall usart_tx
rjmp again




usart_rx: sbis UCSRA,RXC
rjmp usart_rx
in r17,UDR

ret


usart_tx: sbis UCSRA,UDRE
rjmp usart_tx
out UDR,r17
ret

;*************************

and set the settings in hyper terminal as

baud rate:2400
flow control:none

;********
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May 8, 2008

Interfacing pic microcontroller with LCD

Here is the code to interface the pic 16F877A PROCESSOR to 16x2 LCD
this is a assembly code and it is properly working just you have to modify some of the routines as per your need.
As this is in assembly it doesn't take any space and also it use 8 bit mode.







; Program Module : Debug board
; Purpose : to show the content of data bus and adress bus
; Programmed By : Kamal Kant Singh
; Date of Start : 26th june,2007
;_________________________________________________________________________



PROCESSOR 16F877A
#include"p16F877A.inc"

__CONFIG _CP_OFF & _WDT_OFF & _XT_OSC & _PWRTE_ON & _BODEN_OFF & _LVP_OFF & _DEBUG_OFF

cblock 0x0021
a1
a2
a3 ; used in sapr
a4
a5
a6 ;for macro PRINT
l1
l2
l3
w_temp
w_temp1
endc


PRINT macro label
local endom
local next_char
clrf a6
next_char
movf a6,w
call label
iorlw 0
btfsc STATUS,Z
goto endom
call send_char
incf a6,f
goto next_char
endom
endm

COMMA macro
movlw ','
call send_char
endm



en equ 2
rs equ 0
rw equ 1



org 0x0000
goto main
org 0x0004
goto main

main
movlw .20
call delayxms
banksel ADCON1
movlw 0x06
movwf ADCON1

banksel TRISA
movlw 0xFF
movwf TRISD ; port B for data bus contents while ports C,D are for address bus contents
movwf TRISB
movwf TRISC
movlw 0x30
movwf TRISA
clrf TRISE

banksel PORTB
clrf PORTB
clrf PORTD
clrf PORTC
clrf PORTE
clrf PORTA


; lcd operation
movlw 0x02
call send_cmd
call init_lcd
;entrance
movlw 0x82
call send_cmd
PRINT eklavya
check_again
movlw 0xC0
call send_cmd
PRINT address
call print_add
movlw 0xca
call send_cmd
PRINT dat
call print_dat
movlw 0xC5
call send_cmd


goto check_again




goto endop






init_lcd
movlw 0x28
call send_cmd
movlw 0x0c
call send_cmd
movlw 0x06
call send_cmd
;movlw 0x1c
;call send_cmd
return





send_cmd
movwf w_temp1
movlw 0x05
call delayxms
swapf w_temp1,w
bcf PORTE,rs
bcf PORTE,rw
movwf PORTA
bsf PORTE,en
nop
nop
bcf PORTE,en
movf w_temp1,w
movwf PORTA
bsf PORTE,en
nop
nop
bcf PORTE,en
movlw 0x03
call delayxms
return

send_char
movwf w_temp1
movlw 0x05
call delayxms
swapf w_temp1,w
bsf PORTE,rs
bcf PORTE,rw
movwf PORTA
bsf PORTE,en
nop
nop
bcf PORTE,en
movf w_temp1,w
movwf PORTA
bsf PORTE,en
nop
nop
bcf PORTE,en
movlw 0x03
call delayxms
return
print_add
movf PORTC,w
call sapr
call asc2
call send_char
movf a3,w
call asc2
call send_char
movf PORTD,w
call sapr
call asc2
call send_char
movf a3,w
call asc2
call send_char
return

print_dat
movf PORTB,w
call sapr
call asc2
call send_char
movf a3,w
call asc2
call send_char
return


sapr
movwf w_temp
andlw 0x0F
movwf a3
swapf w_temp,w
andlw 0x0F
return


delay3xms
movwf w_temp1
call delayxms
movf w_temp1,w
call delayxms
movf w_temp1,w
call delayxms
return


delayxms
movwf l1
up
call delay1ms
decfsz l1,f
goto up
return

delay1ms
movlw .62
movwf l2
delay4us
nop
decfsz l2,f
goto delay4us
return


asc2
addwf PCL,f
retlw '0'
retlw '1'
retlw '2'
retlw '3'
retlw '4'
retlw '5'
retlw '6'
retlw '7'
retlw '8'
retlw '9'
retlw 'A'
retlw 'B'
retlw 'C'
retlw 'D'
retlw 'E'
retlw 'F'

address
addwf PCL,f
retlw 'A'
retlw 'D'
retlw 'D'
retlw ':'
retlw 0

dat
addwf PCL,f
retlw 'D'
retlw 'T'
retlw ':'
retlw 0

eklavya
addwf PCL,f
retlw ' '
retlw 'E'
retlw 'k'
retlw 'l'
retlw 'a'
retlw 'v'
retlw 'y'
retlw 'a'
retlw ' '
retlw '1'
retlw '.'
retlw '0'
retlw ' '
retlw 0



endop
goto endop
end

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